libogc  v2.5.0
Macros | Functions
cache.h File Reference

Cache subsystem. More...

#include <gctypes.h>
#include <gcbool.h>

Macros

#define LC_BASE   (LC_BASEPREFIX<<16)
 
#define LC_BASEPREFIX   0xe000
 
#define LCGetBase()   ((void*)LC_BASE)
 

Functions

void DCDisable (void)
 Disable L1 d-cache. More...
 
void DCEnable (void)
 Enable L1 d-cache. More...
 
void DCFlashInvalidate (void)
 Invalidate L1 d-cache. More...
 
void DCFlushRange (void *startaddress, u32 len)
 Flushes a given range. More...
 
void DCFlushRangeNoSync (void *startaddress, u32 len)
 Flushes a given range. More...
 
void DCFreeze (void)
 Current contents of the L1 d-cache are locked down and will not be cast out. More...
 
void DCInvalidateRange (void *startaddress, u32 len)
 Invalidates a given range of the d-cache. More...
 
void DCStoreRange (void *startaddress, u32 len)
 Ensures a range of memory is updated with any modified data in the cache. More...
 
void DCStoreRangeNoSync (void *startaddress, u32 len)
 Ensures a range of memory is updated with any modified data in the cache. More...
 
void DCTouchRange (void *startaddress, u32 len)
 Loads a range of memory into cache. More...
 
void DCUnfreeze (void)
 Undoes actions of DCFreeze(). More...
 
void DCZeroRange (void *startaddress, u32 len)
 Loads a range of memory into cache and zeroes all the cache lines. More...
 
void ICBlockInvalidate (void *startaddress)
 Invalidates a block in the i-cache. More...
 
void ICDisable (void)
 Disable L1 i-cache. More...
 
void ICEnable (void)
 Enable L1 i-cache. More...
 
void ICFlashInvalidate (void)
 Invalidate the L1 i-cache. More...
 
void ICFreeze (void)
 Current contents of the L1 i-cache are locked down and will not be cast out. More...
 
void ICInvalidateRange (void *startaddress, u32 len)
 Invalidate a range in the L1 i-cache. More...
 
void ICSync (void)
 Performs an instruction cache synchronization. More...
 
void ICUnfreeze (void)
 Undoes actions of ICFreeze(). More...
 
void LCAlloc (void *, u32)
 
void LCAllocNoInvalidate (void *, u32)
 
void LCAllocOneTag (BOOL, void *)
 
void LCAllocTags (BOOL, void *, u32)
 
void LCDisable (void)
 
void LCEnable (void)
 
void LCFlushQueue (void)
 
void LCLoadBlocks (void *, void *, u32)
 
u32 LCLoadData (void *, void *, u32)
 
u32 LCQueueLength (void)
 
u32 LCQueueWait (u32)
 
void LCStoreBlocks (void *, void *, u32)
 
u32 LCStoreData (void *, void *, u32)
 

Detailed Description

Cache subsystem.

Function Documentation

◆ DCDisable()

void DCDisable ( void  )

Disable L1 d-cache.

Returns
none

◆ DCEnable()

void DCEnable ( void  )

Enable L1 d-cache.

Returns
none

◆ DCFlashInvalidate()

void DCFlashInvalidate ( void  )

Invalidate L1 d-cache.

   An invalidate operation is issued that marks the state of each data cache block as invalid without writing back modified cache blocks to memory.<br>
   Cache access is blocked during this time.Bus accesses to the cache are signaled as a miss during invalidate-all operations.
Returns
none

◆ DCFlushRange()

void DCFlushRange ( void *  startaddress,
u32  len 
)

Flushes a given range.

   If any part of the range hits in the d-cache the corresponding block will be flushed to main memory and invalidated.<br>
   <b><i>NOTE:</i></b> This function invokes a "sync" after flushing the range. This means the function will stall until the CPU knows that the data has been writen to main memory
Parameters
[in]startaddresspointer to the startaddress of the memory range to flush. NOTE: Has to be aligned on a 32byte boundery
[in]lenlength of range to be flushed. NOTE: Should be a multiple of 32
Returns
none

◆ DCFlushRangeNoSync()

void DCFlushRangeNoSync ( void *  startaddress,
u32  len 
)

Flushes a given range.

   If any part of the range hits in the d-cache the corresponding block will be flushed to main memory and invalidated.<br>
   <b><i>NOTE:</i></b> This routine does not perform a "sync" to ensure that the range has been flushed to memory.  That is, the cache blocks are sent to the bus interface unit for storage to main memory, but by the time this function returns, you are not guaranteed that the blocks have been written to memory.
Parameters
[in]startaddresspointer to the startaddress of the memory range to flush. NOTE: Has to be aligned on a 32byte boundery
[in]lenlength of range to be flushed. NOTE: Should be a multiple of 32
Returns
none

◆ DCFreeze()

void DCFreeze ( void  )

Current contents of the L1 d-cache are locked down and will not be cast out.

   Hits are still serviced, but misses go straight to L2 or 60x bus.  Most cache operations, such as DCFlushRange(), will still execute regardless of whether the cache is frozen.<br>
       <b><i>NOTE:</i></b> In PowerPC architecture jargon, this feature is referred to as "locking" the data cache.  We use the word "freeze" to distinguish it from the locked cache and DMA features.
Returns
none

◆ DCInvalidateRange()

void DCInvalidateRange ( void *  startaddress,
u32  len 
)

Invalidates a given range of the d-cache.

   If any part of the range hits in the d-cache, the corresponding block will be invalidated.
Parameters
[in]startaddresspointer to the startaddress of the memory range to invalidate. NOTE: Has to be aligned on a 32byte boundery
[in]lenlength of the range to invalidate. NOTE: Should be a multiple of 32
Returns
none

◆ DCStoreRange()

void DCStoreRange ( void *  startaddress,
u32  len 
)

Ensures a range of memory is updated with any modified data in the cache.

   <b><i>NOTE:</i></b> This function invokes a "sync" after storing the range. This means the function will stall until the CPU knows that the data has been writen to main memory
Parameters
[in]startaddresspointer to the startaddress of the memory range to store. NOTE: Has to be aligned on a 32byte boundery
[in]lenlength of the range to store. NOTE: Should be a multiple of 32
Returns
none

◆ DCStoreRangeNoSync()

void DCStoreRangeNoSync ( void *  startaddress,
u32  len 
)

Ensures a range of memory is updated with any modified data in the cache.

   <b><i>NOTE:</i></b> This routine does not perform a "sync" to ensure that the range has been flushed to memory.  That is, the cache blocks are sent to the bus interface unit for storage to main memory, but by the time this function returns, you are not guaranteed that the blocks have been written to memory
Parameters
[in]startaddresspointer to the startaddress of the memory range to store. NOTE: Has to be aligned on a 32byte boundery
[in]lenlength of the range to store. NOTE: Should be a multiple of 32
Returns
none

◆ DCTouchRange()

void DCTouchRange ( void *  startaddress,
u32  len 
)

Loads a range of memory into cache.

Parameters
[in]startaddresspointer to the startaddress of the memory range to load. NOTE: Has to be aligned on a 32byte boundery
[in]lenlength of the range to load. NOTE: Should be a multiple of 32
Returns
none

◆ DCUnfreeze()

void DCUnfreeze ( void  )

Undoes actions of DCFreeze().

   Old cache blocks will now be cast out on subsequent L1 misses.<br>
          <b><i>NOTE:</i></b> In PowerPC architecture jargon, this feature is referred to as "locking" the data cache.  We use the word "freeze" to distinguish it from the locked cache and DMA features.
Returns
none

◆ DCZeroRange()

void DCZeroRange ( void *  startaddress,
u32  len 
)

Loads a range of memory into cache and zeroes all the cache lines.

Parameters
[in]startaddresspointer to the startaddress of the memory range to load/zero. NOTE: Has to be aligned on a 32byte boundery
[in]lenlength of the range to load/zero. NOTE: Should be a multiple of 32
Returns
none

◆ ICBlockInvalidate()

void ICBlockInvalidate ( void *  startaddress)

Invalidates a block in the i-cache.

   If the block hits in the i-cache, the corresponding block will be invalidated.
Parameters
[in]startaddresspointer to the startaddress of the memory block to invalidate. NOTE: Has to be aligned on a 32byte boundery
Returns
none

◆ ICDisable()

void ICDisable ( void  )

Disable L1 i-cache.

Returns
none

◆ ICEnable()

void ICEnable ( void  )

Enable L1 i-cache.

Returns
none

◆ ICFlashInvalidate()

void ICFlashInvalidate ( void  )

Invalidate the L1 i-cache.

   An invalidate operation is issued that marks the state of each instruction cache block as invalid without writing back modified cache blocks to memory.<br>
   Cache access is blocked during this time. Bus accesses to the cache are signaled as a miss during invalidate-all operations.
Returns
none

◆ ICFreeze()

void ICFreeze ( void  )

Current contents of the L1 i-cache are locked down and will not be cast out.

   Hits are still serviced, but misses go straight to L2 or 60x bus.<br>
       <b><i>NOTE:</i></b> In PowerPC architecture jargon, this feature is referred to as "locking" the data cache.  We use the word "freeze" to distinguish it from the locked cache and DMA features.
Returns
none

◆ ICInvalidateRange()

void ICInvalidateRange ( void *  startaddress,
u32  len 
)

Invalidate a range in the L1 i-cache.

   If any part of the range hits in the i-cache, the corresponding block will be invalidated.
Parameters
[in]startaddresspointer to the startaddress of the memory range to invalidate. NOTE: Has to be aligned on a 32byte boundery
[in]lenlength of the range to invalidate. NOTE: Should be a multiple of 32
Returns
none

◆ ICSync()

void ICSync ( void  )

Performs an instruction cache synchronization.

   This ensures that all instructions preceding this instruction have completed before this instruction completes.
Returns
none

◆ ICUnfreeze()

void ICUnfreeze ( void  )

Undoes actions of ICFreeze().

   Old cache blocks will now be cast out on subsequent L1 misses.<br>
       <b><i>NOTE:</i></b> In PowerPC architecture jargon, this feature is referred to as "locking" the data cache.  We use the word "freeze" to distinguish it from the locked cache and DMA features.
Returns
none